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Mateo Valero
First name(s): Mateo
Last name(s): Valero

Publications of Mateo Valero sorted by recency
Understanding the Overhead of the Spin-Lock Loop in CMT Architectures, Javier Verdú Vladimir Cakarevic, Petar Radojkovic and Mateo Valero, in: WIOSCA '08: In Procs. of Workshop on the Interaction between Operating Systems and Computer Architecture, 2008
A Simulator for SMT Architectures: Evaluating Instruction Cache Topologies, Ronaldo Goncalves, Eduard Ayguade, Mateo Valero and Philippe Navaux

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[URL]
Dynamically Controlled Resource Allocation in SMT Processors, Francisco J. Cazorla, Alex Ramirez, Mateo Valero and Enrique Fernandez, in: MICRO 37: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, Portland, Oregon, pages 171--182, IEEE Computer Society, 2004
[DOI]
Predictable performance in SMT processors, Francisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernandez, Alex Ramirez and Mateo Valero, in: CF '04: Proceedings of the 1st conference on Computing frontiers, Ischia, Italy, pages 433--443, ACM Press, 2004
[DOI]