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Computer Architecture
Topic: Transactional Memory
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-No description- Subtopics: Keywords: |
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Publications for topic "Transactional Memory"
2008
| Applications of the Adaptive Transactional Memory Test Platform, , in: TRANSACT 2008: 3rd ACM SIGPLAN Workshop on Transactional Computing, 2008 |
| The Adaptive Transactional Memory Test Platform: A Tool for Experimenting with Transactional Code for Rock, , and , in: TRANSACT 2008: 3rd ACM SIGPLAN Workshop on Transactional Computing, 2008 |
2007
| A Study of a Transactional Parallel Routing Algorithm, , and , in: PACT '07: Proceedings of the 16th International Conference on Parallel Architecture and Compilation Techniques, pages 388--398, IEEE Computer Society, 2007 |
[DOI] |
| An Effective Hybrid Transactional Memory System with Strong Isolation Guarantees, , , , , , , and , in: ISCA '07: Proceedings of the 34th Annual International Symposium on Computer Architecture, 2007 |
| The OpenTM Transactional Application Programming Interface, , , , and , in: PACT '07: Proceedings of the 16th International Conference on Parallel Architecture and Compilation Techniques, pages 376--387, IEEE Computer Society, 2007 |
[DOI] |
| Transactional Memory: An Overview, , , , , , and , pages 8--29, IEEE Computer Society Press, 2007 |
[DOI] |
| Unlocking concurrency, , and (2007), in: Queue, 4:10(24--33) |
[DOI] |
2006
| McRT-STM: a high performance software transactional memory system for a multi-core runtime, , , , and , in: PPoPP '06: Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming, New York, New York, USA, pages 187--197, ACM, 2006 |
[DOI] |
| The Common Case Transactional Behavior of Multithreaded Programs, , , , , , and , in: HPCA '06: Proceedings of the IEEE 12th International Symposium on High Performance Computer Architecture, 2006 |
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| Transactional Locking II, , in: DISC: Proceedings of the 20th International Symposium on Distributed Computing (DISC), Stockholm, 2006 |
2004
| Transactional coherence and consistency: simplifying parallel hardware and software, (2004), in: IEEE Micro, 24:6(92--103) |
[DOI] |
| Transactional Memory Coherence and Consistency, , , , , , , , , and , in: ISCA '04: Proceedings of the 31st annual international symposium on Computer architecture, München, Germany, pages 102, IEEE Computer Society, 2004 |
1993
| Transactional Memory: Architectural Support For Lock-Free Data Structures, and , in: ISCA '93: Proceedings of the 20th annual international symposium on Computer architecture, 1993 |
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