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All publications not assigned to a topic sorted by title

A

A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning, G. Edward Suh, Srinivas Devadas and Larry Rudolph, in: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), pages 117-, 2002
A quantitative framework for automated pre-execution thread selection, Amir Roth and Gurindar S. Sohi, in: MICRO 35: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, Istanbul, Turkey, pages 430--441, IEEE Computer Society Press, 2002
A Survey of Packages for Large Linear Systems, Kesheng Wu and Brent Milne

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A Technique for Variable Dependence Driven Loop Peeling, Litong Song and Krishna M Kavi, in: ICA3PP '02: Proceedings of the Fifth International Conference on Algorithms and Architectures for Parallel Processing, pages 390, IEEE Computer Society, 2002
An Implementation and Analysis of the Virtual Interface Architecture, P. Buonadonna, A. Geweke and D. Culler, in: Supercomputing, 1998. SC98. IEEE/ACM Conference on, pages 16 - 16, 1998
[DOI]

B

Basic Local Alignment Search Tool, Stephen F. Altschul, Warren Gish, Webb Miller, Eugene W. Meyers and David J. Lipman (1990), in: Journal of Molecular Biology, 215:3(403--410)

C

Coming challenges in microarchitecture and architecture, R. Ronen, A. Mendelson, K. Lai, S. Lu, F. Pollack and John P. Shen, 2001

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Computer Architecture. A Quantitative Approach, David Patterson and John Hennessy, pages 373-504, Morgan Kaufmann Pub., 2002

E

Effects of Memory Performance on Parallel Job Scheduling, G. Edward Suh, Larry Rudolph and Srinivas Devadas (2001), in: Lecture Notes in Computer Science, 2221(116-)
Evaluating the Performance of Cache-Affinity Scheduling in Shared-Memory Multiprocessors, Josep Torrellas, A. Tucker and A. Gupta (1995), in: Journal of Parallel and Distributed Computing, 24:2(139--151)
Execution-based prediction using speculative slices, Craig Zilles and Gurindar S. Sohi, in: ISCA '01: Proceedings of the 28th annual international symposium on Computer architecture, G\&\#246;teborg, Sweden, pages 2--13, ACM Press, 2001
[DOI]
Exploiting Application-Level Information to Reduce Memory Bandwidth Consumption, Deepak Agarwal and Donald Yeung, in: Proceedings of the 4th Workshop on Complexity-Effective Design, held in conjunction with the 30th International Symposium on Computer Architecture (ISCA-30), 2003

G

Gang Scheduling Performance Benefits for Fine-Grain Synchronization, Dror G. Feitelson and Larry Rudolph (1992), in: Journal of Parallel and Distributed Computing, 16:4(306--318)
Gang Scheduling with Memory Considerations, Anat Batat and Dror G. Feitelson, in: Proceedings of the 14th International Parallel and Distributed Processing Symposium (IPDPS 2000), pages 109--114, 2000

H

Handling long-latency loads in a simultaneous multithreading processor, Dean M. Tullsen and Jeffery A. Brown, in: MICRO 34: Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, Austin, Texas, pages 318--327, IEEE Computer Society, 2001
Hitting the Memory Wall: Implications of the Obvious, Wm. A. Wulf and Sally A. McKee (1995), in: ACM SIGARCH Computer Architecture News, 23:1(20--24)

I

IA-32 Intel Architecture Optimization Reference Manual, Intel Corporation

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Improving performance of sparse matrix-vector multiplication, Ali Pinar and Michael T. Heath, in: Supercomputing '99: Proceedings of the 1999 ACM/IEEE conference on Supercomputing, Portland, Oregon, United States, pages 30, ACM, 1999
[DOI]
Improving the memory-system performance of sparse-matrix vector multiplication, S. Toledo (1997), in: IBM Journal of Research and Development, 41:6(711--725)

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Irregular Computations in Fortran - Expression and Implementation Strategies, Jan F. Prins, Siddhartha Chatterjee and Martin Simons

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L

Linux Device Drivers, 3rd Edition, Jonathan Corbet, Alessandro Rubini and Greg K. Hartman, O'Reilly Media, Inc., 2005

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M

Master/slave speculative parallelization, Craig Zilles and Gurindar S. Sohi, in: MICRO 35: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, Istanbul, Turkey, pages 85--96, IEEE Computer Society Press, 2002
Maximizing TLP with loop-parallelization on SMT, Diego Puppin and Dean M. Tullsen, in: MTEAC-5 : 5th Workshop on Multithreaded Execution, Architecture, and Compilation, 2001

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Memory Bandwidth and Machine Balance in Current High Performance Computers, J. D. McCalpin (1995), in: IEEE Technical Committee on Computer Architecture (TCCA) Newsletter
Memory Bandwidth Limitations of Future Microprocessors, Doug Burger, James R. Goodman and Alain Kagi, in: Proceedings of the 23rd Annual International Symposium on Computer Architecture ({ISCA-23}), pages 78--89, 1996
Multithreaded Processors, Theo Ungerer, Borut Robic and Jurij Silc (2001), in: The Computer Journal, 45(3)(320--348)

N


O


P

Performance Analysis using the MIPS R10000 Performance Counters, Marco Zagha, Brond Larson, Steve Turner and Marty Itzkowitz, in: Proceedings of the 1996 ACM/IEEE Supercomputing Conference on High Performance Networking and Computing (SC96), pages 16, ACM Press, 1996
Performance optimizations and bounds for sparse matrix-vector multiply, Richard Vuduc, James W. Demmel, Katherine A. Yelick, Shoaib Kamil, Rajesh Nishtala and Benjamin Lee, in: Supercomputing '02: Proceedings of the 2002 ACM/IEEE conference on Supercomputing, Baltimore, Maryland, pages 1--35, IEEE Computer Society Press, 2002
Pointer cache assisted prefetching, Jamison D. Collins, Suleyman Sair, Brad Calder and Dean M. Tullsen, in: MICRO 35: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, Istanbul, Turkey, pages 62--73, IEEE Computer Society Press, 2002
Preliminary Thoughts on Memory-Bus Scheduling, Jochen Liedtke, Marcus Völp and Kevin Elphinstone, in: Proceedings of the 9th workshop on ACM SIGOPS European workshop, pages 207--210, ACM Press, 2000

Q


R

Register integration: a simple and efficient implementation of squash reuse, Amir Roth and Gurindar S. Sohi, in: MICRO 33: Proceedings of the 33th annual ACM/IEEE international symposium on Microarchitecture, Monterey, California, United States, pages 223--234, ACM Press, 2000
[DOI]

S

Scheduling Algorithms with Bus Bandwidth Considerations for SMPs, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos and Theodore S. Papatheodorou, in: Proceedings of the 2003 International Conference on Parallel Processing (ICPP 2003), pages 547, 2003
Simple, Fast, and Practical Non-Blocking and Blocking Concurrent Queue Algorithms, Maged M. Michael and Michael L. Scott, in: Symposium on Principles of Distributed Computing, pages 267--275, 1996

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Software Data Prefetching for Software Pipelined Loops, Jesus Sanchez and Antonio Gonzalez (1999), in: J. Parallel Distrib. Comput., 58:2(236--259)
[DOI]
SPAID: software prefetching in pointer- and call-intensive environments, Mikko H. Lipasti, William J. Schmidt, Steven R. Kunkel and Robert R. Roediger, in: MICRO 28: Proceedings of the 28th annual ACM/IEEE international symposium on Microarchitecture, Ann Arbor, Michigan, United States, pages 231--236, IEEE Computer Society Press, 1995
Speculative Data-Driven Multithreading, Amir Roth and Gurindar S. Sohi, in: HPCA '01: Proceedings of the IEEE 7th International Symposium on High Performance Computer Architecture, pages 37, IEEE Computer Society, 2001
Speculative Precomputation: Exploring the Use of Multithreading for Latency, Hong Wang, Perry H. Wang, Scott M. Ettinger, Steve Shih-wei Liao and John P. Shen, in: Intel Technology Journal, 2002

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Strong Accountability for Network Storage, Aydan R. Yumerefendi and Jeffrey S. Chase, in: 5th USENIX Conference on File and Storage Technologies, 2007
Symbiotic jobscheduling with priorities for a simultaneous multithreading processor, Allan Snavely, Dean M. Tullsen and Geoff Voelker, in: SIGMETRICS'02: Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, Marina Del Rey, California, pages 66--76, ACM Press, 2002
[DOI]

T

The elements of cache programming style, Chris B. Sears, in: ALS'00: Proceedings of the 4th conference on 4th Annual Linux Showcase \& Conference, Atlanta, Atlanta, Georgia, pages 18--18, USENIX Association, 2000
The new approach for inter-communication between guest domains on Virtual Machine Monitor, Hyun-Sup Shin, Kang-Ho Kim, Chei-Yol Kim and Sung-In Jung, in: Computer and information sciences, 2007. iscis 2007. 22nd international symposium on, pages 1-6, 2007
[DOI]
The nucleus of a multiprogramming system, Per Brinch Hansen (1970), in: ACM Communication, 13:4(238--241)
Towards a first vertical prototyping of an extremely fine-grained parallel programming approach, Dorit Naishlos, Joseph Nuzman, Chau-Wen Tseng and Uzi Vishkin, in: SPAA '01: Proceedings of the thirteenth annual ACM symposium on Parallel algorithms and architectures, Crete Island, Greece, pages 93--102, ACM, 2001
[DOI]

U

Using Spin-Loops on Intel Pentium 4 Processor and Intel Xeon Processor, Intel Corporation, 2001

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V

Virtualizing I/O Devices on VMware Workstation's Hosted Virtual Machine Monitor, Jeremy Sugerman, Ganesh Venkitachalam and Beng-Hong Lim, in: Proceedings of the General Track: 2002 USENIX Annual Technical Conference, pages 1--14, USENIX, 2001

X