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Publications for keyword "spr"
2007
| Accelerating and Adapting Precomputation Threads for Effcient Prefetching, , and , in: HPCA '07: Proceedings of the IEEE 13th International Symposium on High Performance Computer Architecture, pages 85--95, IEEE Computer Society, 2007 |
[DOI] |
2004
| Compiler orchestrated prefetching via speculation and predication, , , and , in: ASPLOS-XI: Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, MA, USA, pages 189--198, ACM, 2004 |
[DOI] |
| Runtime support for integrating precomputation and thread-level parallelism on simultaneous multithreaded processors, , and , in: LCR '04: Proceedings of the 7th workshop on Workshop on languages, compilers, and run-time support for scalable systems, Houston, Texas, pages 1--12, ACM Press, 2004 |
[DOI] |
2003
| Optimizing SMT Processors for High Single-Thread Performance, , and (2003), in: The Journal of Instruction-Level Parallelism, 5 |
2002
| A quantitative framework for automated pre-execution thread selection, and , in: MICRO 35: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, Istanbul, Turkey, pages 430--441, IEEE Computer Society Press, 2002 |
| Master/slave speculative parallelization, and , in: MICRO 35: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, Istanbul, Turkey, pages 85--96, IEEE Computer Society Press, 2002 |
| Speculative Precomputation: Exploring the Use of Multithreading for Latency, , , , and , in: Intel Technology Journal, 2002 |
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2001
| Coarse-Grained Thread Pipelining: A Speculative Parallel Execution Model for Shared-Memory Multiprocessors, and (2001), in: IEEE Trans. Parallel Distrib. Syst., 12:9(952--966) |
[DOI] |
| Execution-based prediction using speculative slices, and , in: ISCA '01: Proceedings of the 28th annual international symposium on Computer architecture, G\&\#246;teborg, Sweden, pages 2--13, ACM Press, 2001 |
[DOI] |
| Speculative Data-Driven Multithreading, and , in: HPCA '01: Proceedings of the IEEE 7th International Symposium on High Performance Computer Architecture, pages 37, IEEE Computer Society, 2001 |
2000
| Register integration: a simple and efficient implementation of squash reuse, and , in: MICRO 33: Proceedings of the 33th annual ACM/IEEE international symposium on Microarchitecture, Monterey, California, United States, pages 223--234, ACM Press, 2000 |
[DOI] |
1999
| Exploiting Speculative Thread-Level Parallelism on a SMT Processor, and , in: HPCN, pages 754--763, Springer-Verlag, 1999 |