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Tiling, Block Data Layout, and Memory Hierarchy Performance
Type of publication: Inproceedings
Citation: park03tiling
Journal: IEEE Trans. Parallel Distrib. Syst.
Volume: 14
Number: 7
Year: 2003
Pages: 640--654
Publisher: IEEE Press
Address: Piscataway, NJ, USA
ISSN: 1045-9219
DOI: 10.1109/tpds.2003.1214317
Keywords: cache
Authors Park, Neungsoo
Hong, Bo
Prasanna, Viktor K.
Added by: []
Total mark: 0
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