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Optimization of Sparse-Matrix Vector Multiplication on Emerging Multicore Platforms, , , , , and , in: Supercomputing '07: Proceedings of the 2007 ACM/IEEE conference on Supercomputing, 2007 |
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Techniques for Designing Efficient Parallel Graph Algorithms for SMPs and Multicore Processors, and , in: ISPA '07: The 5th International Symposium on Parallel and Distributed Processing and Applications (ISPA 2007), 2007 |
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The OpenTM Transactional Application Programming Interface, , , , and , in: PACT '07: Proceedings of the 16th International Conference on Parallel Architecture and Compilation Techniques, pages 376--387, IEEE Computer Society, 2007 |
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Thread clustering: sharing-aware scheduling on SMP-CMP-SMT multiprocessors, , and , in: EuroSys '07: Proceedings of the 2nd ACM SIGOPS/EuroSys European Conference on Computer Systems 2007, Lisbon, Portugal, pages 47--58, ACM, 2007 |
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Designing Multithreaded Algorithms for Breadth-First Search and st-connectivity on the Cray MTA-2, and , in: ICPP '06: Proceedings of the 2006 International Conference on Parallel Processing, pages 523--530, IEEE Computer Society, 2006 |
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Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers, , , , , and , in: MICRO 39: Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, pages 235--246, IEEE Computer Society, 2006 |
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Exploiting the performance of 32 bit floating point arithmetic in obtaining 64 bit accuracy (revisiting iterative refinement for linear systems), , , , , and , in: Supercomputing '06: Proceedings of the 2006 ACM/IEEE conference on Supercomputing, Tampa, Florida, pages 113, ACM, 2006 |
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Exploiting Unbalanced Thread Scheduling for Energy and Performance on a CMP of SMT Processors, , and , in: IPDPS '06: Proceedings of the 20th International Symposium on Parallel and Distributed Processing, 2006 |
Extending the OpenMP Standard for Thread Mapping and Grouping, , in: IWOMP '06: International Workshop on OpenMP, 2006 |
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High performance VMM-bypass I/O in virtual machines, , , and , in: ATEC '06: Proceedings of the annual conference on USENIX '06 Annual Technical Conference, Boston, MA, pages 3--3, USENIX, 2006 |
Learning-Based SMT Processor Resource Distribution via Hill-Climbing, and , in: ISCA '06: Proceedings of the 33rd annual international symposium on Computer Architecture, pages 239--251, IEEE Computer Society, 2006 |
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Lightweight lock-free synchronization methods for multithreading, , , , , , , and , in: ICS '06: Proceedings of the 20th annual international conference on Supercomputing, Cairns, Queensland, Australia, pages 361--371, ACM, 2006 |
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McRT-STM: a high performance software transactional memory system for a multi-core runtime, , , , and , in: PPoPP '06: Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming, New York, New York, USA, pages 187--197, ACM, 2006 |
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Online power-performance adaptation of multithreaded programs using hardware event-based prediction, , , and , in: ICS '06: Proceedings of the 20th annual international conference on Supercomputing, Cairns, Queensland, Australia, pages 157--166, ACM, 2006 |
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Optimizing Network Virtualization in Xen, , and , in: 2006 USENIX Annual Technical Conference, 2006 |
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The Common Case Transactional Behavior of Multithreaded Programs, , , , , , and , in: HPCA '06: Proceedings of the IEEE 12th International Symposium on High Performance Computer Architecture, 2006 |
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An Evaluation of OpenMP on Current and Emerging Multithreaded/Multicore Processors, , , and , in: IWOMP '05: International Workshop on OpenMP, 2005 |
Automatic Thread Extraction with Decoupled Software Pipelining, , , and , in: MICRO 38: Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture, pages 105--118, IEEE Computer Society, 2005 |
Characterization and analysis of HMMER and SVM-RFE parallel bioinformatics applications, , in: Proceedings of the IEEE International Workload Characterization Symposium, pages 87--98, 2005 |
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Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors, , and , in: PACT '05: Proceedings of the 14th international conference on Parallel architectures and compilation techniques, pages 99--109, IEEE Computer Society, 2005 |
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Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window, , in: PACT '05: Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques, pages 231--242, IEEE Computer Society, 2005 |
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Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors, and , in: PACT '05: Proceedings of the 14th international conference on Parallel architectures and compilation techniques, pages 350--360, IEEE Computer Society, 2005 |
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Hyper-Threading Aware Process Scheduling Heuristics, and , in: ATEC'05: Proceedings of the USENIX Annual Technical Conference 2005 on USENIX Annual Technical Conference, Anaheim, CA, pages 27--27, USENIX Association, 2005 |
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Integrating Multiple Forms of Multithreaded Execution on multi-SMT Systems: A Study with Scientific Applications, , , and , in: QEST '05: Proceedings of the Second International Conference on the Quantitative Evaluation of Systems (QEST'05) on The Quantitative Evaluation of Systems, 2005 |
LU-GPU: Efficient Algorithms for Solving Dense Linear Systems on Graphics Hardware, , , and , in: Supercomputing '05: Proceedings of the 2005 ACM/IEEE conference on Supercomputing, IEEE Computer Society, 2005 |
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Multigrain parallel Delaunay Mesh generation: challenges and opportunities for multithreaded architectures, , , , , and , in: ICS '05: Proceedings of the 19th annual international conference on Supercomputing, Cambridge, Massachusetts, pages 367--376, ACM, 2005 |
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Optimizing a 3D-FWT Video Encoder for SMPs and HyperThreading Architectures, , , and , in: PDP '05: Proceedings of the 13th Euromicro Conference on Parallel, Distributed and Network-Based Processing, pages 76--83, IEEE Computer Society, 2005 |
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Optimizing Compiler for the CELL Processor, , , , , , , , , , , , and , in: PACT '05: Proceedings of the 14th international conference on Parallel architectures and compilation techniques, pages 161-172, 2005 |
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Partitioning Multi-Threaded Processors with a Large Number of Threads, , , and , in: ISPASS 2005: IEEE International Symposium on Performance Analysis of Systems and Software, 2005., pages 112-123, 2005 |
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Performance Evaluation of Parallel Sparse Matrix-Vector Products on SGI Altix 3700, , , , , and , in: IWOMP '05: International Workshop on OpenMP, 2005 |
QEMU, a fast and portable dynamic translator, , in: Proceedings of the annual conference on USENIX Annual Technical Conference, Anaheim, CA, pages 41--41, USENIX Association, 2005 |
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Runtime Empirical Selection of Loop Schedulers on Hyperthreaded SMPs., and , in: IPDPS '05: Proceedings of the 19th International Symposium on Parallel and Distributed Processing, 2005 |
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Scheduling Algorithms for Effective Thread Pairing on Hybrid Multiprocessors., , and , in: IPDPS '05: Proceedings of the 19th International Symposium on Parallel and Distributed Processing, 2005 |
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smt- SPRINTS: Software Precomputation with Intelligent Streaming for Resource-Constrained SMTs., , and , in: Euro-Par '05: Proceedings of the 11th International Euro-Par Conference on Parallel Processing, pages 710--719, 2005 |
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Stream Programming on General-Purpose Processors, and , in: MICRO 38: Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture, pages 343--354, IEEE Computer Society, 2005 |
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The Mitosis Speculative Multithreaded Architecture, , , , and , in: ParCo '05: Proceedings of the International Conference ParCo 2005, pages 27--38, 2005 |
A Minimal Dual-Core Speculative Multi-Threading Architecture., , , and , in: ICCD '04: Proceedings of the 2004 International Conference on Computer Design, pages 360--367, 2004 |
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An Adaptive OpenMP Loop Scheduler for Hyperthreaded SMPs, , , , and , in: PDCS '04, 2004 |
Architectural Support for Enhanced SMT Job Scheduling., , , and , in: PACT '04: Proceedings of the 13th international conference on Parallel architectures and compilation techniques, pages 63--73, 2004 |
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Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy, , , and , in: MICRO 37: Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture, Portland, Oregon, pages 183--194, IEEE Computer Society, 2004 |
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Compiler orchestrated prefetching via speculation and predication, , , and , in: ASPLOS-XI: Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, Boston, MA, USA, pages 189--198, ACM, 2004 |
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Decoupled Software Pipelining with the Synchronization Array, , , and , in: PACT '04: Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques, pages 177--188, IEEE Computer Society, 2004 |
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Dynamically Controlled Resource Allocation in SMT Processors, , , and , in: MICRO 37: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, Portland, Oregon, pages 171--182, IEEE Computer Society, 2004 |
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Evaluating the Impact of RDMA on Storage I/O over InfiniBand, , , and , in: SAN-03 Work- shop (in conjunction with HPCA), 2004, 2004 |
Implementation of Fine-Grained Cache Monitoring for Improved SMT Scheduling., and , in: ICCD '04: Proceedings of the 2004 International Conference on Computer Design, pages 326--331, 2004 |
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Improving the Locality of the Sparse Matrix-Vector Product on Shared Memory Multiprocessors, , , and , in: PDP '04: Proceedings of the 12th Euromicro Conference on Parallel, Distributed and Network-Based Processing, pages 66, IEEE Computer Society, 2004 |
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Myrinet eXpress (MX): Is Your Interconnect Smart?, , in: HPCASIA '04: Proceedings of the High Performance Computing and Grid in Asia Pacific Region, Seventh International Conference, pages 452--452, IEEE Computer Society, 2004 |
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Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors, , , , , , , , , and , in: CGO '04: Proceedings of the International Symposium on Code Generation and Optimization, Palo Alto, California, pages 27, IEEE Computer Society, 2004 |
Predictable performance in SMT processors, , , , , and , in: CF '04: Proceedings of the 1st conference on Computing frontiers, Ischia, Italy, pages 433--443, ACM Press, 2004 |
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Runtime support for integrating precomputation and thread-level parallelism on simultaneous multithreaded processors, , and , in: LCR '04: Proceedings of the 7th workshop on Workshop on languages, compilers, and run-time support for scalable systems, Houston, Texas, pages 1--12, ACM Press, 2004 |
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Transactional Memory Coherence and Consistency, , , , , , , , , and , in: ISCA '04: Proceedings of the 31st annual international symposium on Computer architecture, München, Germany, pages 102, IEEE Computer Society, 2004 |
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors., , in: ISHPC, pages 54--69, 2003 |
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Exploiting Application-Level Information to Reduce Memory Bandwidth Consumption, and , in: Proceedings of the 4th Workshop on Complexity-Effective Design, held in conjunction with the 30th International Symposium on Computer Architecture (ISCA-30), 2003 |
Exploring the Use of Hyper-Threading Technology for Multimedia Applications with Intel OpenMP Compiler, , , , , and , in: IPDPS '03: Proceedings of the 16th International Symposium on Parallel and Distributed Processing, pages 36.1, IEEE Computer Society, 2003 |
Extending OpenMP to Support Slipstream Execution Mode, and , in: IPDPS '03: Proceedings of the 16th International Symposium on Parallel and Distributed Processing, pages 36.2, IEEE Computer Society, 2003 |
Front-End Policies for Improved Issue Efficiency in SMT Processors, and , in: HPCA '03: Proceedings of the 9th International Symposium on High-Performance Computer Architecture, pages 31, IEEE Computer Society, 2003 |
Initial Observations of the Simultaneous Multithreading Pentium 4 Processor, and , in: PACT '03: Proceedings of the 12th international conference on Parallel architectures and compilation techniques, pages 26, IEEE Computer Society, 2003 |
Mini-Threads: Increasing TLP on Small-Scale SMT Processors, , and , in: HPCA '03: Proceedings of the IEEE 9th International Symposium on High Performance Computer Architecture, pages 19, IEEE Computer Society, 2003 |
Scheduling Algorithms with Bus Bandwidth Considerations for SMPs, , and , in: Proceedings of the 2003 International Conference on Parallel Processing (ICPP 2003), pages 547, 2003 |
Slipstream execution mode for CMP-based multiprocessors, , and , in: HPCA '03: Proceedings of the IEEE 9th International Symposium on High Performance Computer Architecture, pages 179--190, 2003 |
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Xen and the art of virtualization, , , , , , , , and , in: SOSP '03: Proceedings of the nineteenth ACM symposium on Operating systems principles, pages 164--177, ACM, 2003 |
A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning, , and , in: Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), pages 117-, 2002 |
A quantitative framework for automated pre-execution thread selection, and , in: MICRO 35: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, Istanbul, Turkey, pages 430--441, IEEE Computer Society Press, 2002 |
A Technique for Variable Dependence Driven Loop Peeling, and , in: ICA3PP '02: Proceedings of the Fifth International Conference on Algorithms and Architectures for Parallel Processing, pages 390, IEEE Computer Society, 2002 |
Denali: Lightweight Virtual Machines for Distributed and Networked Applications, , and , in: In Proc. of the USENIX Annual Technical Conference, 2002 |
Design and evaluation of compiler algorithms for pre-execution, and , in: ASPLOS-X: Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, California, pages 159--170, ACM Press, 2002 |
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GNBD/VIA: a network block device over virtual interface architecture on Linux, , and , in: Parallel and Distributed Processing Symposium., Proceedings International, IPDPS 2002, Abstracts and CD-ROM, pages 7 pp-, 2002 |
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Master/slave speculative parallelization, and , in: MICRO 35: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, Istanbul, Turkey, pages 85--96, IEEE Computer Society Press, 2002 |
Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines, , , , , and , in: Int'l Parallel and Distributed Processing Symposium, Fort Lauderdale, FL, 2002 |
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On increasing architecture awareness in program optimizations to bridge the gap between peak and sustained processor performance: matrix-multiply revisited, , and , in: Supercomputing '02: Proceedings of the 2002 ACM/IEEE conference on Supercomputing, Baltimore, Maryland, pages 1--11, IEEE Computer Society Press, 2002 |
Performance optimizations and bounds for sparse matrix-vector multiply, , , , , and , in: Supercomputing '02: Proceedings of the 2002 ACM/IEEE conference on Supercomputing, Baltimore, Maryland, pages 1--35, IEEE Computer Society Press, 2002 |
Pointer cache assisted prefetching, , , and , in: MICRO 35: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, Istanbul, Turkey, pages 62--73, IEEE Computer Society Press, 2002 |
Speculative Precomputation on Chip Multiprocessors, , , , and , in: MTEAC-6 : 6th Workshop on Multithreaded Execution, Architecture, and Compilation, 2002 |
Speculative Precomputation: Exploring the Use of Multithreading for Latency, , , , and , in: Intel Technology Journal, 2002 |
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Symbiotic jobscheduling with priorities for a simultaneous multithreading processor, , and , in: SIGMETRICS'02: Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, Marina Del Rey, California, pages 66--76, ACM Press, 2002 |
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Thread-Spawning Schemes for Speculative Multithreading, and , in: HPCA '02: Proceedings of the IEEE 8th International Symposium on High Performance Computer Architecture, pages 55, IEEE Computer Society, 2002 |
Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance, and , in: PACT '02: Proceedings of the 11th international conference on Parallel architectures and compilation techniques, pages 30, IEEE Computer Society, 2002 |
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Handling long-latency loads in a simultaneous multithreading processor, and , in: MICRO 34: Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, Austin, Texas, pages 318--327, IEEE Computer Society, 2001 |
Maximizing TLP with loop-parallelization on SMT, and , in: MTEAC-5 : 5th Workshop on Multithreaded Execution, Architecture, and Compilation, 2001 |
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Multi-Chain Prefetching: Effective Exploitation of Inter-Chain Memory Parallelism for Pointer-Chasing Codes, , , and , in: PACT '01: Proceedings of the 10th international conference on Parallel architectures and compilation techniques, pages 268--279, IEEE Computer Society, 2001 |
OPIOM: off-processor IO with Myrinet, , in: Cluster Computing and the Grid, 2001. Proceedings. First IEEE/ACM International Symposium on, pages 261 -268, 2001 |
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Quadrics Network (QsNet): High-Performance Clustering Technology, , , , and , in: Hot Interconnects 9, 2001 |
Speculative Data-Driven Multithreading, and , in: HPCA '01: Proceedings of the IEEE 7th International Symposium on High Performance Computer Architecture, pages 37, IEEE Computer Society, 2001 |
Speculative precomputation: long-range prefetching of delinquent loads, , , , , , and , in: ISCA '01: Proceedings of the 28th annual international symposium on Computer architecture, G\&\#246;teborg, Sweden, pages 14--25, ACM Press, 2001 |
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Tolerating memory latency through software-controlled pre-execution in simultaneous multithreading processors, , in: ISCA '01: Proceedings of the 28th annual international symposium on Computer architecture, G\&\#246;teborg, Sweden, pages 40--51, ACM Press, 2001 |
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Virtualizing I/O Devices on VMware Workstation's Hosted Virtual Machine Monitor, , and , in: Proceedings of the General Track: 2002 USENIX Annual Technical Conference, pages 1--14, USENIX, 2001 |
A Prefetching Technique for Irregular Accesses to Linked Data Structures, , and , in: HPCA '00: Proceedings of the IEEE 6th International Symposium on High Performance Computer Architecture, pages 206--217, 2000 |
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Fast Synchronization on Scalable Cache-Coherent Multiprocessors using Hybrid Primitives, and , in: IPDPS '00: Proceedings of the 14th International Symposium on Parallel and Distributed Processing, pages 711, IEEE Computer Society, 2000 |
Gang Scheduling with Memory Considerations, and , in: Proceedings of the 14th International Parallel and Distributed Processing Symposium (IPDPS 2000), pages 109--114, 2000 |
Precedence Relations in the OpenMP Programming Model, , , , and , in: EWOMP '00: Second European Workshop on OpenMP, 2000 |
Preliminary Thoughts on Memory-Bus Scheduling, , and , in: Proceedings of the 9th workshop on ACM SIGOPS European workshop, pages 207--210, ACM Press, 2000 |
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