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Computer Architecture
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Topic: Synchronization

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  • 11 publications (0 read)
  • 35 authors [view]
  • No subtopics
Publications for topic "Synchronization" sorted by title

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Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers, Jack Sampson, Ruben Gonzalez, Jean-Francois Collard, Norman P. Jouppi, Mike Schlansker and Brad Calder, in: MICRO 39: Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, pages 235--246, IEEE Computer Society, 2006
[DOI]

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Fast Synchronization on Scalable Cache-Coherent Multiprocessors using Hybrid Primitives, Dimitrios S. Nikolopoulos and D. S. Papatheodorou, in: IPDPS '00: Proceedings of the 14th International Symposium on Parallel and Distributed Processing, pages 711, IEEE Computer Society, 2000

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Lightweight lock-free synchronization methods for multithreading, Arun Kejariwal, Hideki Saito, Xinmin Tian, Milind Girkar, Wel Li, Utpal Banerjee, Alexandru Nicolau and Constantine D. Polychronopoulos, in: ICS '06: Proceedings of the 20th annual international conference on Supercomputing, Cairns, Queensland, Australia, pages 361--371, ACM, 2006
[DOI]

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On the Role of Deterministic Fine-Grain Data Synchronization for Scientific Applications: A Revisit in the Emerging Many-Core Era, Weirong Zhu, Ziang Hu and Gao G.R., in: IPDPS '07: Proceedings of the 20th International Symposium on Parallel and Distributed Processing, pages 1--8, 2007
[DOI]

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Supporting Fine-Grained Synchronization on a Simultaneous Multithreading Processor, Dean M. Tullsen, Jack L. Lo, Susan J. Eggers and Henry M. Levy, in: HPCA '99: Proceedings of the IEEE 5th International Symposium on High Performance Computer Architecture, pages 54, IEEE Computer Society, 1999
Synchronization state buffer: supporting efficient fine-grain synchronization on many-core architectures, Weirong Zhu, Vugranam C Sreedhar, Ziang Hu and Guang R. Gao, in: ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture, San Diego, California, USA, pages 35--45, ACM, 2007
[DOI]

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Understanding the Overhead of the Spin-Lock Loop in CMT Architectures, Javier Verdú Vladimir Cakarevic, Petar Radojkovic and Mateo Valero, in: WIOSCA '08: In Procs. of Workshop on the Interaction between Operating Systems and Computer Architecture, 2008