(r6) BibSMT < CSLab

CSLab Web>BibPortal>BibSMT (revision 6) (raw view)~~EditAttach~~
This portal provides links to various research papers on simultaneous multithreading.

A more extensive (yet outdated) paper list can be found here:

   * [[http://tbp.berkeley.edu/~jdonald/research/hyperthreading][Simultaneous Multithreading resources @ UC Berkeley]]

---+++ General on Simultaneous Multithreading

   * _"Simultaneous Multithreading: A Platform for Next-Generation Processors"_. S. Eggers, J. Emer, H. Levy, J. Lo, R. Stamm, D. Tullsen. IEEE Micro, vol. 17, no. 5, *IEEE Micro 1997*. ([[ftp://ftp.cs.washington.edu/tr/1997/04/UW-CSE-97-04-02.PS.Z][ps]])
   * _"ILP versus TLP on SMT"_. N. Mitchell, L. Carter, J. Ferrante, D. Tullsen. Proceedings of the ACM/IEEE conference on Supercomputing, *SC 1999*. ([[http://www-cse.ucsd.edu/users/tullsen/ilpvtlp.ps][ps]])




---+++ SMT Implementations 

   * _"Hyper-Threading Technology Architecture and Microarchitecture"_. D. Marr, F. Binns, D. Hill, G. Hinton, D. Koufaty, J. Miller, M. Upton. Intel Technology Journal, vol.3, issue 1, *ITJ 2002*. ([[http://download.intel.com/technology/itj/2002/volume06issue01/art01_hyper/vol6iss1_art01.pdf][pdf]])
   * _"Initial Observations of the Simultaneous Multithreading Pentium 4 Processor"_. N. Tuck, D. Tullsen. Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques, *PACT 2003*. ([[http://www-cse.ucsd.edu/users/tullsen/pact03.pdf][pdf]])
   * _"IBM Power5 Chip: A Dual-Core Multithreaded Processor"_. R. Kalla, B. Sinharoy, J. Tendler. IEEE Micro, vol. 24, no. 2, *IEEE Micro 2004*. ([[http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1289290][pdf]]) ([[http://www.cslab.ece.ntua.gr/papers-repo/cmps/Power5.pdf][CSLab]]) ([[http://www.research.ibm.com/journal/rd/494/sinharoy.html][IBM link]])



  
---+++ Resource Sharing in SMTs

   * _"Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Orocessor"_. D. Tullsen, S. Eggers, J. Emer, H. Levy, J. Lo, R. Stamm. Proceedings of the 23th annual International Symposium on Computer Architecture, *ISCA 1996*. ([[http://www-cse.ucsd.edu/users/tullsen/ISCA96.ps][ps]])
   * _"Handling Long-Latency Loads in a Simultaneous Multithreading Processor"_. D. Tullsen, J. Brown. Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture, *MICRO 2001*. ([[http://www-cse.ucsd.edu/users/tullsen/smtload.pdf][pdf]])
   * _"Front-End Policies for Improved Issue Efficiency in SMT Processors"_. A. Moursy, D. Albonesi. Proceedings of the 9th International Symposium on High-Performance Computer Architecture, *HPCA 2003*. ([[http://www.ece.rochester.edu/~albonesi/research/papers/hpca03_1.pdf][pdf]])
   * _"The Impact of Resource Partitioning on SMT Processors"_. S. Raasch, S. Reinhardt. Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques, *PACT 2003*. ([[http://www.eecs.umich.edu/~stever/pubs/pact03.pdf][pdf]])  
   * _"Dynamically Controlled Resource Allocation in SMT Processors"_. F. Cazorla, A. Ramirez, M. Valero, E. Fernandez. Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, *MICRO 2004*. ([[http://personals.ac.upc.edu/fcazorla/articles/fcazorla_dcra2004.pdf][pdf]])
   * _"Learning-Based SMT Processor Resource Distribution via Hill-Climbing"_. S. Choi, D. Yeung. Proceedings of the 33rd annual International Symposium on Computer Architecture, *ISCA 2006*. ([[http://maggini.eng.umd.edu/pub/2006-ISCA-Hill.pdf][pdf]])
   * _"Software-Controlled Priority Characterization of POWER5 Processor"_. C. Boneti, F. Cazorla, R. Gioiosa, A. Buyuktosunoglu, C. Cher, M. Valero. SIGARCH Comput. Archit. News, ACM, 36, 415-426, *SIGARCH-CAN 2008*. ([[http://personals.ac.upc.edu/fcazorla/articles/cboneti_isca_2008.pdf][pdf]])
   * _"An Adaptive Resource Partitioning Algorithm for SMT Processors"_. H. Wang, I. Koren, C. Krishna. Proceedings of the 17th international conference on Parallel Architectures and Compilation Techniques, *PACT 2008*. ([[http://euler.ecs.umass.edu/research/SMT-PACT08.pdf][pdf]])




---+++ Helper Threading

   * _"Simultaneous Subordinate Microthreading (SSMT)"_. S. Chappell, J. Stark, S. Kim, S. Reinhardt, Y. Patt. Proceedings of the 26th annual international Symposium on Computer Architecture, *ISCA 1999*. ([[http://www.eecs.umich.edu/~stever/pubs/isca99.pdf][pdf]])
   * _"Tolerating Latency through Software-Controlled Pre-Execution in Simultaneous Multithreading Processors"_. C. Luk. Proceedings of the 28th Annual International Symposium on Computer Architecture, *ISCA 2001*. ([[http://www.cs.cmu.edu/~luk/luk_papers/isca01.ps.gz][ps]])
   * _"Speculative Precomputation: Long-range Prefetching of Delinquent Loads"_. J. Collins, H. Wang, D. Tullsen, C. Hughes, Y. Lee, D. Lavery, J. Shen. Proceedings of the 28th annual International Symposium on Computer Architecture, *ISCA 2001*. ([[http://www-cse.ucsd.edu/users/tullsen/isca2001.pdf][pdf]])
   * _"Speculative Precomputation: Exploring the Use of Multithreading for Latency"_. H. Wang, P. Wang, R. Weldon, S. Ettinger, H. Saito, M. Girkar, S. Liao, J. Shen. Intel Technology Journal, vol.3, issue 1, *ITJ 2002*. ([[http://download.intel.com/technology/itj/2002/volume06issue01/art03_specprecomp/vol6iss1_art03.pdf][pdf]])
   * _"Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance"_. G. Dorai, D. Yeung. Proceedings of the 11th international conference on Parallel Architectures and Compilation Techniques, *PACT 2002*. ([[http://maggini.eng.umd.edu/pub/dorai212.pdf][pdf]])
   * _"Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors"_. D. Kim, J. Shen, S. Liao, P. Wang, J. Cuvillo, X. Tian, X. Zou, H. Wang, D. Yeung, M. Girkar. Proceedings of the international symposium on Code Generation and Optimization: feedback-directed and runtime optimization, *CGO 2004*. ([[http://maggini.eng.umd.edu/pub/pre-exec-cgo2004.pdf][pdf]])




---+++ Synchronization

   * _"Supporting Fine-Grained Synchronization on a Simultaneous Multithreading Processor"_. D. Tullsen, J. Lo, S. Eggers, H. Levy. Proceedings of the IEEE 5th International Symposium on High Performance Computer Architecture, *HPCA 1999*. ([[http://www-cse.ucsd.edu/users/tullsen/HPCA5synch.ps][ps]])
   * _"Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers"_. J. Sampson, R. Gonzalez, J. Collard, N. Jouppi, M. Schlansker, B. Calder. Proceedings of the International Symposium on Microarchitecture, *MICRO 2006*. ([[http://www.cse.ucsd.edu/~calder/papers/MICRO-06-Barriers.pdf][pdf]])





---+++ Job Scheduling

   * _"Symbiotic Job Scheduling with Priorities for a Simultaneous Multithreading Processor"_. A. Snavely, D. Tullsen, G. Voelker. Proceedings of the 2002 ACM SIGMETRICS international conference on Measurement and modeling of computer systems, *SIGMETRICS 2002*. ([[http://www-cse.ucsd.edu/users/tullsen/sigmet02.pdf][pdf]])
   * _"Architectural Support for Enhanced SMT Job Scheduling"_. A. Settle, J. Kihm, A. Janiszewski, D. Connors. Proceedings of the 13th international conference on Parallel Architectures and Compilation Techniques, *PACT 2004*. ([[http://rogue.colorado.edu/draco/papers/pact04-smt.pdf][pdf]])
   * _"Scheduling Algorithms for Effective Thread Pairing on Hybrid Multiprocessors"_. R. McGregor, C. Antonopoulos, D. Nikolopoulos. Proceedings of the 19th International Symposium on Parallel and Distributed Processing, *IPDPS 2005*. ([[http://people.cs.vt.edu/~dsn/papers/IPDPS_2005.pdf][pdf]])
   * _"Hyper-threading Aware Process Scheduling Heuristics"_. J. Bulpin, I. Patt. Proceedings of the USENIX Annual Technical Conference 2005 on USENIX Annual Technical Conference, *USENIX 2005*. ([[http://www.cl.cam.ac.uk/~jrb44/docs/bulpin_usenix05.pdf][pdf]])
   * _"Dynamic Run-Time Architecture Techniques for Enabling Continuous Optimization"_. T. Moseley, A. Shye, V. Reddi, M. Iyer, D. Fay, D. Hodgdon, J. Kihm, A. Settle, D. Grunwald, D. Connors. Proceedings of the 2nd conference on Computing Frontiers, *CF 2005*. ([[http://rogue.colorado.edu/draco/papers/cf05-draco.pdf][pdf]])
   * _"Compatible Phase Co-Scheduling on a CMP of Multi-threaded Processors"_. A. El-Moursy, R. Garg, D. Albonesi, S. Dwarkadas. Proceedings of the 20th International Symposium on Parallel and Distributed Processing, *IPDPS 2006*. ([[http://www.cs.sfu.ca/~fedorova/Teaching/CMPT886/Spring2007/papers/compatible-phase-coscheduling.pdf][pdf]])
   * _"Thread Clustering: Sharing-Aware Scheduling on SMP-CMP-SMT Multiprocessors"_. D. Tam, R. Azimi, M. Stumm. Proceedings of the 2nd ACM SIGOPS/EuroSys European Conference on Computer Systems, *EuroSys 2007*. ([[http://www.eecg.utoronto.ca/~tamda/papers/threadclustering.pdf][pdf]])




---+++ Code Optimizations and Runtime Techniques

   * _"Tuning Compiler Optimizations for Simultaneous Multithreading"_. J. Lo, S. Eggers, H. Levy, S. Parekh, D. Tullsen. Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, *MICRO 1997*. ([[http://www-cse.ucsd.edu/users/tullsen/smtcompiler.ps][ps]])
   * _"Maximizing TLP with Loop-Parallelization on SMT"_. D. Puppin, D. Tullsen. 5th Workshop on Multithreaded Execution, Architecture, and Compilation, *MTEAC 2001*. ([[http://cag.lcs.mit.edu/commit/papers/01/diego_SMT_MTEAC.ps][ps]])
   * _"Code and Data Transformations for Improving Shared Cache Performance on SMT Processors"_. D. Nikolopoulos. ISHPC, pp. 54-69, *ISHPC 2003*. ([[http://people.cs.vt.edu/~dsn/papers/ISHPC_2003_corrected.pdf][pdf]])
   * _"Runtime Support for Integrating Precomputation and Thread-Level Parallelism on Simultaneous Multithreaded Processors"_. M. Curtis-Maury, T. Wang, C. Antonopoulos,  D. Nikolopoulos. Proceedings of the 7th workshop on Workshop on languages, compilers, and run-time support for scalable systems, *LCR 2004*. ([[http://people.cs.vt.edu/~dsn/papers/LCR_2004.pdf][pdf]])
   * _"Runtime Empirical Selection of Loop Schedulers on Hyperthreaded SMPs"_. Y. Zhang, M. Voss. Proceedings of the 19th International Symposium on Parallel and Distributed Processing, *IPDPS 2005*. ([[http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=1419864&isnumber=30685][pdf]])([[http://www.cslab.ece.ntua.gr/papers-repo/smt/Runtime_empirical_selection_of_loop_schedulers_on_hyperthreaded_SMPs.pdf][CSLab]])
   * _"Integrating Multiple Forms of Multithreaded Execution on multi-SMT Systems: A Study with Scientific Applications"_. M. Curtis-Maury, T. Wang, C. Antonopoulos, D. Nikolopoulos. Proceedings of the Second International Conference on the Quantitative Evaluation of Systems, *QEST 2005*. ([[http://people.cs.vt.edu/~dsn/papers/QEST_2005.pdf][pdf]])
   * _"Dynamic Tiling for Effective Use of Shared Caches on Multithreaded Processors"_. D. Nikolopoulos. International Journal of High Performance Computing and Networking, Vol. 2, pp. 22-35, *IJHPCN 2006*. ([[http://people.cs.vt.edu/~dsn/papers/IJHPCN_2004.pdf][pdf]])





---+++ Applications 

   * _"Database Hash-Join Algorithms on Multithreaded Computer Architectures"_. P. Garcia, H. Korth. Proceedings of the 3rd conference on Computing Frontiers, *CF 2006*. ([[http://portal.acm.org/ft_gateway.cfm?id=1128055&type=pdf&coll=GUIDE&dl=GUIDE&CFID=5375546&CFTOKEN=25291073][pdf]])([[http://www.cslab.ece.ntua.gr/papers-repo/smt/Database_hash_join_algorithms_on_multithreaded_computer_architectures.pdf][CSLab]])
   * _"Multigrain Parallel Delaunay Mesh Generation: Challenges and Opportunities for Multithreaded Architectures"_. C. Antonopoulos, X. Ding, A. Chernikov, F. Bagojevic, D. Nikolopoulos, N. Chrisochoides. Proceedings of the 19th annual international conference on Supercomputing, *ICS 2005*. ([[http://people.cs.vt.edu/~dsn/papers/ICS_2005.pdf][pdf]])
   * _"Stream Programming on General-Purpose Processors"_. J. Gummaraju, M. Rosenblum. Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture, *MICRO 2005*. ([[http://merrimac.stanford.edu/publications/micro38_streamingGPP.pdf][pdf]])







---+++ SMT Extensions and Variations

   * _"Mini-Threads: Increasing TLP on Small-Scale SMT Processors"_. J. Redstone, S. Eggers, H. Levy. Proceedings of the IEEE 9th International Symposium on High Performance Computer Architecture, *HPCA 2003*. ([[http://www.cs.washington.edu/research/smt/papers/minithreads.pdf][pdf]])
   * _"Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy"_. E. Tune, R. Kumar, D. Tullsen, B. Calder. Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture, *MICRO 2004*. ([[http://www-cse.ucsd.edu/users/tullsen/balancedmt.pdf][pdf]])
Topic revision: r6 - 2008-11-19 - NikosAnastopoulos
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